Introduction
Design a high definition camera suitable for the aeronautics and aerospace industries. The camera will consist of two sections, connected by cable, to allow for remote imager placement with respect to the readout electronics.
HDcam Rev 1
HDcam Rev 2.0
HDcam Rev 2.1
HDcam Rev 3
January 2011 - Project Discussions
In January, the Rev 1 schematic design was started, and completed in a week.
Rev 1.0.0 Diagram
Rev 1.0.0 Imager
Rev 1.0.0 Receiver
February 2011 - Proposal / Rev 1 Design
In February, the Rev 1 schematic design was updated and the PCB layout finished.
The official proposal was sent to Chuck at the end of the month.
Rev 1.0.2 Diagram
Rev 1.0.2 Imager
Rev 1.0.2 Receiver
Rev 1.0.2 Layout
March 2011 - Rev 1 Assembly / Testing
In March, the first Rev 1 prototype PCB was assembled and testing began on it.
BeagleBoard-xM's were ordered and arrived for evaluation.
BeagleBoard-xM
April 2011 - BeagleBoard Software / Imager Contact
In April, software was installed on the BeagleBoard and Aptina driver was found.
We were successful in probing the I2C bus for devices and reading I2C registers.
The serializer link was complicated to set up correctly and get working.
Necessary information on wakeup was missing from initial serializer datasheet.
Terry started developing SatCam, a Java software interface for the computer user.
Andrew developed i2ctool, a utility for displaying I2C registers in a GUI window.
Mike developed i2c_text, a utility for displaying I2C registers in a text window.
On April 30, we established first contact with the imager and read I2C registers.
HDcam Prototype Camera
HDcam Prototype by Mass Storage Drive
Mike Andrew and Terry by Prototype
Terry watching over Mike and Andrew
Mike and Andrew working
Mike Andrew and Terry by o-scope
HDcam system on 4/19
Rev 1 #2 Imager
Rev 1 #2 Imager solder paste
Rev 1 #2 Imager soldered
May 2011 - Linux Kernel Compile / First Picture
In May, we gained full I2C control of all devices and compiled the Linux kernel.
On May 13, the first picture was captured with the LeopardBoard: me and my cat.
On May 25, the BeagleBoard software was re-installed due to boot problems.
On May 28, the Linux kernel source was installed on the BeagleBoard.
On May 29, we successfully compiled 1st uImage from kernel source on BeagleBoard.
On May 30, the first picture was captured with the Rev 1 camera: a quarter.
The next night was spent refining the camera for an upcoming demonstration.
Prototype boxed up
Imager close-up
Imager pins close-up
Green Screen Of Death
1st picture from LeopardBoard
HDcam system on 5/13 after 1st image
Logic analyzer probes
Logic analyzer screen
Logic analyzer screen
HDcam desktop
1st picture from Prototype
quarter from Prototype
Prototype camera ready to demo
To-Do list from previous picture
June 2011 - Rev 1 Demo / Rev 2 Design
In June, we demonstrated the Rev 1 camera to Peter Smith and started Rev 2 PCB.
On June 4, started assembly of a Rev 1 #2 prototype, which took a week to do.
On June 12, we cross-compiled a new uImage and fixed USB problem with BB Rev C.
On June 13, we developed Aptina register scripts for setting gain and exposure.
On June 21, we captured a video stream as an avi file.
On June 29, Rev 1 #1 prototype was mounted to tripod with longer cable for use.
On June 30, Rev 2 PCB design was completed and ordered.
Rev 1 #2 serializer
Rev 1 #2 serializer solder paste
Rev 1 #2 serializer soldered
Rev 1 #2 front
Rev 1 #2 back
Rev 1 #2 camera
Rev 1 #2 on BeagleBoard
Prototype #1 on tripod and long cable
HD capture: Bill and Mike
HD capture: colorbars
Full-frame capture: Andrew and Zach
Full-frame capture: Mike and Andrew
Full-frame green screen
July 2011 - Rev 2 Assembly
In July, Mike took a vacation to Florida and was absent from July 5-11.
On July 17, Tiger interface docs; Task Goal Status Report.
On July 24, Rev 2 assembly was started, and continued into August.
On July 26, Linux kernel 2.6.39 was released, but we don't yet know we need it.
On July 28, I2C issues were discovered and fixed in under a week.
HDcam Rev 1 ready to go
HDcam Rev 2 PCBs
HDcam Rev 2 PCBs cut apart
HDcam Rev 2 PCBs with chips
August 2011 - Rev 2 Delivered / Rev 3 Design
In August, Rev 2 was delivered and Rev 3 design started.
On August 3, Rev 1 #2 was delivered to the SOC for sensor testing by students.
On August 8, Rev 2 assembly was finished; testing and debugging took a week.
On August 17, first Rev 2 camera was delivered to Chuck; two more a week later.
On August 26, Rev 3 design and integration was discussed and layout started.
On August 26, there was also a change to the OPI contract specs.
On August 27, we captured pseudo-RAW data with missing bits.
On August 31, kernel 2.6.39 and media-ctl were mentioned as utils for raw data.
Register values after I2C fix
Prototype #2 ready for delivery
BeagleBoard
Prototype #2 SOC setup
BeagleBoard and Receiver
Imager and lens mounted
Rev 2 PCBs assembled
Rev 2.0 PCBs all soldered
Rev 2 PCBs wired
HDcam Rev 2.0 close-up
HDcam Rev 2.0 close-up
HDcam Rev 2.1 close-up
Rev 2.0 PCB assembly
Rev 2.0 PCB assembly
Rev 2.0 PCB assembly
Rev 2.0 PCBs all assembled
Rev 2.1 mounted in box
Rev 2.1 ready for delivery
Cameras in the box
Colorbars glow
Camera in the dark
Beagle in the dark
Rev 2 cameras
Rev 2 cameras epoxied
Full-frame dim exposure
Full-frame test exposure
Full-frame colorbars
September 2011 - Pseudo RAW Data / Old Kernel
In September, we studied the OMAP datasheet for RAW data path through the ISP.
The ISP hardware only supports 8/10 bits for Previewer and Resizer data paths.
Data lane shifter allows selection of upper or lower 8/10 of 12 bits, not all.
Upper bits selected by default, decimating the lower bits, resulting in "0" data.
Code written for pseudo-RAW data capture, selecting lower bits for sensitivity.
Need "Data Path C" which sends 12-bit CCDC data strait to memory, bypassing ISP.
On September 10, lightning strikes Bill's house, damaging development computer.
On September 13, Rev 3.1 Imager PCB assembly started, which took a week to do 4.
On September 14, a New Deal for CubeSat was announced from Marcus, ROM generated.
On September 19, we decided on 3 paths moving forward: kernel 32, 39, or 3.0.
On September 5, Rev 3 layout was passed to Raytheon; Mike to work on RAW data.
On October 5, Rev 3.2 layout was passed back to Mike, which took a week.
Pseudo-RAW data: lower bits
Pseudo-RAW data: upper bits
Pseudo-RAW data: picture
Pseudo-RAW data: colorbars
October 2011 - Real RAW Data / New Kernel
In October, we had to compile the 2.6.39 kernel and modify all new camera driver.
Difficulty getting new kernel fully working on BB and serializer link wakeup.
Trouble detecting sensor reliably on boot, despite communication retries.
Had to compile and modify two programs to work with our setup (media-ctl yavta).
On October 29, we finally captured real 12-bit sGRBG RAW data at 2592x1944.
On October 21, Rev 3.2 PCB assembly began; completed November; tested December.
A new FPGA based design was discussed to replace the BeagleBoard.
Rev 3.2 PCBs
1st RAW data image
Good RAW data
Bad RAW data
Bill Andrew Mike
November 2011 - Stable RAW Data / CCDC Idle
In November, we had to deal with RAW data capture instability issues.
No data captured ("CCDC won't become idle") and BeagleBoard lockups were common.
Solution was to test for running process, kill it after a certain time and retry.
On November 29, we achieved stable RAW data and direct control of the registers.
5555 data file from bad capture
Imager with tape in corner
Lower exposure using registers
Dark image with a few hot pixels
December 2011 - Valid RAW Data / Test Pattern
In December, we had to deal with intermittent invalid RAW data.
Pixels GRGR are expected but RGRG are received, causing Bayer filter color shift.
Solution was to set test pattern and check for valid frame just before capture.
On December 18, we achieved stable, valid RAW data capture; later the full array.
We spent the rest of the month and year refining the process and writing scripts.
On December 23, Rev 3 was picked up from Chuck for testing.
HDcam system on 12/24
Clean bench setup
Colorchart Good
Colorchart Bad
LEDs Bad
LEDs Good
Colorbars Good
Colorbars Bad
Colorbars
Colorchart
Tungsten light
LED light
Daytime light
2592x1944
640x480
320x240
2592x2002
2736x2003
2736x2003 shifted
640x480
2592x1944
2736x2003
656x483 YUVU
Red Gain 0
Reg Gain 8
January 2012 - Rev 3 Testing / Software Integration
In January, probing began on Rev 3 and communications problems were discovered.
The high speed serial link was not stable on either channel.
Problem found to be long Flat Flex Cable to imager board in camera box.
Partial solution is to set Aptina registers to slow clock and data slew rates.
Link comes up unreliable by default so setting slew rate register is error prone.
Real solution is to reduce FFC length or electrical enhancement of imager signals.
On January 1, Marcus circulated a draft proposal for a FPGA based design.
On January 21, Terry got SatCam working with the new software system.
On January 29, final assembly and testing of Rev 3 with cameras mounted in boxes.
On January 30, delivered Rev 3 to Chuck with one channel working; rejected.
Default Image
Blue Gain
Red Gain
Green Gain
Long Exposure
Rev 3 probing
Bench setup
4 Camera systems
3 Camera systems
Rev 3 live video
Rev 3 PCB top
Rev 3 PCB bottom
Rev 3 camera boxes
Rev 3 camera box assembly
Rev 3 camera assembled
Rev 3 and Rev 2 cameras
Rev 3 camera
Rev 3 live video
February 2012 - Demo / Final Delivery
On February 1, delivered Rev 3 to Chuck with both channels working; accepted.
On February 2, Terry over testing SatCam with new changes; packaging for SOC.
On February 3, afternoon SOC demo Video and RAW on Rev 2; took back Rev 3.
On February 6, a February 29 deadline was set for demo unit delivery.
Rev 2 camera setup
Picture of a video
SOC bench with CubeSat
SOC camera demo live video
Rev 2 looking toward Prototype- HDcam Rev 1
- HDcam Rev 2.0
- HDcam Rev 2.1
- HDcam Rev 3
Page updated: February 10, 2012